ТЕМА: вопрос по коду модуля синхронизации VGA

///////////////////////////////////////////////////////////////
//module which generates video sync impulses
///////////////////////////////////////////////////////////////

module hvsync (
// inputs:
input wire char_clock,

// outputs:
output reg [7:0]char_count,
output reg [1:0]pixel_state,
output reg [11:0]line_count,
output reg [1:0]line_state,
output reg hsync,
output reg vsync
);

//variables
reg end_of_line;
reg end_of_frame;

//permanent comb computations:
always @*
begin
//horizontal processing
if(char_count < 100)
pixel_state = 0; //active video
else
if(char_count < 105)
pixel_state = 1; //front porch
else
if(char_count < 121)
pixel_state = 2; //hsync impuls
else
pixel_state = 3; //back porch

if(char_count < 132)
end_of_line = 0;
else
end_of_line = 1;

//vert processing
if(line_count < 600)
line_state = 0; //active video lines
else
if(line_count < 601)
line_state = 1; //front porch
else
if(line_count < 605)
line_state = 2; //vsync impuls
else
line_state = 3; //front porch

if(line_count < 628)
end_of_frame = 0;
else
end_of_frame = 1;
end

//synchronous process
always @(posedge char_clock)
begin
hsync <= (pixel_state==2'b10);
vsync <= (line_state==2'b10);

if(end_of_line)
begin
char_count <= 0;

if(end_of_frame)
line_count <= 0;
else
line_count <= line_count + 1'b1;
end
else
begin
char_count <= char_count + 1'b1;
end
end

endmodule